Address Register Assignment for Reducing Code Size
Abstract elided by the publisher.
Related papers
- Storage Assignment to Decrease Code Size PLDI 1995
- Storage Assignment to Decrease Code Size TOPLAS 1996
- Optimizing Address Code Generation for Array-Intensive DSP Applications CGO 2005
- An optimization framework for embedded processors with auto-addressing mode TOPLAS 2010
- Code Generation for Single-Dimension Software Pipelining of Multi-Dimensional Loops CGO 2004
- Register allocation for Intel processor graphics CGO 2018
- Evicted Variables and the Interaction of Global Register Allocation and Symbolic Debugging POPL 1993
- Allocating architected registers through differential encoding TOPLAS 2007