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Tsmart-GalsBlock: a toolkit for modeling, validation, and synthesis of multi-clocked embedded systems

Yu Jiang, Hehua Zhang, Huafeng Zhang, Xinyan Zhao, Han Liu, Chengnian Sun, Xiaoyu Song, Ming Gu, Jia-Guang Sun

Abstract

The key challenges of the model-driven approach to designing multi-clocked embedded systems are three-fold: (1) how to model local synchronous components and asynchronous communication between components in a single framework, (2) how to ensure the correctness of the model, and (3) how to maintain the consistency between the model and the implementation of the system. In this paper, we present Tsmart, a self-contained toolkit to address these three challenges. Tsmart seamlessly integrates (1) a graphical editor to facilitate the modeling of the complex behaviors and structures in an embedded system, (2) a simulator for interactive graphical simulation to understand and debug the system model, (3) a verication engine to verify the correctness of the system design, and (4) a synthesis engine to automatically generate ecient executable VHDL code from the model. The toolkit has been successfully applied to designing the main control system of a train communication controller, and the system has already been deployed and in operation. The evaluation of Tsmart on this real industrial application demonstrates the eectiveness and the potential of the toolkit.

BibTeX
@inproceedings{Jiang-al:FSE14,
  author    = {Yu Jiang and
               Hehua Zhang and
               Huafeng Zhang and
               Xinyan Zhao and
               Han Liu and
               Chengnian Sun and
               Xiaoyu Song and
               Ming Gu and
               Jia{-}Guang Sun},
  title     = {{Tsmart-GalsBlock:} a toolkit for modeling, validation, and synthesis of multi-clocked embedded systems},
  booktitle = {FSE},
  pages     = {711--714},
  publisher = {{ACM}},
  year      = {2014},
}

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