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Mitigating power side channels during compilation

Jingbo Wang, Chungha Sung, Chao Wang

Abstract

The code generation modules inside modern compilers, which use a limited number of CPU registers to store a large number of program variables, may introduce side-channel leaks even in software equipped with state-of-the-art countermeasures. We propose a program analysis and transformation based method to eliminate such leaks. Our method has a type-based technique for detecting leaks, which leverages Datalog-based declarative analysis and domain-specific optimizations to achieve high efficiency and accuracy. It also has a mitigation technique for the compiler's backend, more specifically the register allocation modules, to ensure that leaky intermediate computation results are stored in different CPU registers or memory locations. We have implemented and evaluated our method in LLVM for the x86 instruction set architecture. Our experiments on cryptographic software show that the method is effective in removing the side channel while being efficient, i.e., our mitigated code is more compact and runs faster than code mitigated using state-of-the-art techniques.

BibTeX
@inproceedings{Wang-al:FSE19,
  author    = {Jingbo Wang and
               Chungha Sung and
               Chao Wang},
  title     = {Mitigating power side channels during compilation},
  booktitle = {{ESEC/SIGSOFT} {FSE}},
  pages     = {590--601},
  publisher = {{ACM}},
  year      = {2019},
}

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