DYANA: An Environment for Embedded System Design and Analysis
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1,553 papers · page 72 of 78
Process Algebra in PVS
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Verification of Hierarchical State/Event Systems Using Reusability and Compositionality
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An Automated Analysis of Ping-Pong Interactions in E-mail Services
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Symbolic Model Checking without BDDs
Symbolic Model Checking [3, 14] has proven to be a powerful technique for the verification of reactive systems. BDDs [2] have traditionally been used as a symbolic representation of the system. In this paper we show how boolean decision procedures, like Stalmarck's Method [16] or…
The ETI Online Service in Action
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Modular State Level Analysis of Distributed Systems Techniques and Tool Support
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Model Checking in CLP
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Fighting Livelock in the i-Protocol: A Comparative Study of Verification Tools
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Analyzing Stochastic Fixed-Priority Real-Time Systems
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Path Exploration Tool
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Using Logic Programs with Stable Model Semantics to Solve Deadlock and Reachability Problems for 1-Safe Petri Nets
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Specifications and Proofs for Ensemble Layers
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On the Benefits of Using the Up-To Techniques for Bisimulation Verification
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Scheduling System Verification
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Hardware Testing Using a Communication Protocol Conformance Testing Tool
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A Light-Weight Framework for Hardware Verification
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From DFA-Frameworks to DFA-Generators: A Unifying Multiparadigm Approach
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Modelling for Mere Mortals
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Automated Fast-Track Reconfiguration of Group Communication Systems
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