Good technology makes the difficult task easy

Abstract

A new language for chip design is presented. The main advantages of the language are explicit conveyer and parallel features fully controlled by the author of chip design. Non trivial industrial example is under discussion. There are run-time estimations and comparison with traditional programming in C.

BibTeX

@inproceedings{Terekhov:FSE13,
  author    = {Andrey Terekhov},
  title     = {Good technology makes the difficult task easy},
  booktitle = {{ESEC/SIGSOFT} {FSE}},
  pages     = {683--686},
  publisher = {{ACM}},
  year      = {2013},
}

Good technology makes the difficult task easy

Abstract

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