CAV 2001
48 papers
- A BDD-Based Model Checker for Recursive Programs
- A Fast Bisimulation Algorithm
- A Practical Approach to Coverage in Model Checking
- A Unifying Model Checking Approach for Safety Properties of Parameterized Systems
- AGVI - Automatic Generation, Verification, and Implementation of Security Protocols
- Analysis of Recursive State Machines
- As Cheap as Possible: Efficient Cost-Optimal Reachability for Priced Timed Automata
- Attacking Symbolic State Explosion
- Automated Inductive Verification of Parameterized Protocols
- Automated Verification of a Randomized Distributed Consensus Protocol Using Cadence SMV and PRISM
- Automatic Abstraction for Verification of Timed Circuits and Systems
- Benefits of Bounded Model Checking at an Industrial Setting
- Binary Reachability Analysis of Pushdown Timed Automata with Dense Clocks
- BooStER: Speeding Up RTL Property Checking of Digital Designs by Word-Level Abstarction
- CLEVER: Divide and Conquer Combinational Logic Equivalence VERification with False Negative Elimination
- Certifying Model Checkers
- Distributed Symbolic Model Checking for µ-Calculus
- EASN: Integrating ASN.1 and Model Checking
- EVC: A Validity Checker for the Logic of Equality with Uninterpreted Functions and Memories, Exploiting Positive Equality, and Conservative Transformations
- Efficient Model Checking Via Büchi Tableau Automata
- Fast LTL to Büchi Automata Translation
- Finding Bugs in an Alpha Microprocessor Using Satisfiability Solvers
- Finite Instantiations in Equivalence Logic with Uninterpreted Functions
- Formalizing a JVML Verifier for Initialization in a Theorem Prover
- ICS: Integrated Canonizer and Solver
- Iterating Transducers
- Java Bytecode Verification: An Overview
- Job-Shop Scheduling Using Timed Automata
- Meta-BDDs: A Decomposed Representation for Layered Symbolic Manipulation of Boolean Functions
- Microarchitecture Verification by Compositional Model Checking
- Model Checking the World Wide Web
- Model Checking with Formula-Dependent Abstract Models
- Parameterized Verification with Automatically Computed Inductive Assertions
- Rewriting for Symbolic Execution of State Machine Models
- Rtdt: A Front-End for Efficient Model Checking of Synchronous Timing Diagrams
- SDLcheck: A Model Checking Tool
- Software Documentation and the Verification Process
- Symmetry and Reduced Symmetry in Model Checking
- TAXYS: A Tool for the Development and Verification of Real-Time Embedded Systems
- TReX: A Tool for Reachability Analysis of Complex Systems
- The SLAM Toolkit
- The Temporal Logic Sugar
- Towards Efficient Verification of Arithmetic Algorithms over Galois Fields GF(2m)
- Transformation-Based Verification Using Generalized Retiming
- Truth/SLC - A Parallel Verification Platform for Concurrent Systems
- Using Timestamping and History Variables to Verify Sequential Consistency
- Verifying Network Protocol Implementations by Symbolic Refinement Checking
- µCRL: A Toolset for Analysing Algebraic Specifications