TACAS 2026
72 papers
- A Case Study in Firmware Verification: Applying Formal Methods to Intel$^\circledR $ TDX Module
- A Myhill-Nerode Characterization and Active Learning for One-Clock Timed Automata
- AKR: A Model Checker for an Adaptative Probabilistic Knowing-How Logic
- Automatically Tightening Access Control Policies with Restricter
- BDD-Based Formula Approximations for Quantified Bit-Vector Satisfiability
- Bit-Precise Interpolation in Bitwuzla
- CTL* Model Checking on Infinite Families of Finite-State Labeled Transition Systems
- Computing Fixpoints of Learned Functions: Chaotic Iteration and Simple Stochastic Games
- Concurrent Permissive Strategy Templates
- DASA: Fully Gradient-Based Program Analysis (Competition Contribution)
- Data Structure Analysis for Binaries
- DeGAS: Gradient-Based Optimization of Probabilistic Programs without Sampling
- Deciding Serializability in Network Systems
- Deconstructing Subset Construction - Reducing While Determinizing
- Demonstrating ARG-V's Generation of Realistic Java Benchmarks for SV-COMP
- Driving by Disproof: A Practical Model Checking Approach to Fleet Coordination
- Efficient Verification of Lingua Franca Programs
- EmergenTheta: Experimental Analyses within the Theta Framework (Competition Contribution)
- Enumerating Choice Terms in Model-Based Quantifier Instantiation
- Equivalence Checking of Quantum Circuits via Path-Sum and Weighted Model Counting
- Error-Tolerant Quantum State Discrimination: Optimization and Quantum Circuit Synthesis
- Evaluating Software Verifiers for C, Java, and SV-LIB - (Report on SV-COMP 2026)
- EvolveGen : Algorithmic Level Hardware Model Checking Benchmark Generation through Reinforcement Learning
- Exploring the SMT-LIB Benchmark Library
- Extending FRET with SLEEC Rules: Formalization, Obligation Inference, and Monitoring
- Fast Ramsey Quantifier Elimination in LIRA (with applications to liveness checking)
- Faster Signature Refinement for Branching Bisimilarity Minimization
- Gillian Debugging: Swinging Through the (Compositional Symbolic Execution) Trees
- Goblint: A Portfolio for Mixed Flow-Sensitive Abstract Interpretation - (Competition Contribution)
- Goblitch: Combining Abstract Interpretation with Symbolic Execution via Witnesses - (Competition Contribution)
- Hint-Based SMT Proof Reconstruction
- Hornix: From LLVM IR to Constrained Horn Clauses and Back (Competition Contribution)
- Iekkë: A SAT-Based Bounded-Round Verifier for Multi-Threaded Programs (Competition Contribution)
- Incremental Forward Reasoning for White-Box Proof Search
- Integrating String Reasoning in Symbolic Execution of C Programs
- JLiSA: The Java Frontend of the Library for Static Analysis (Competition Contribution)
- LTLf Learning Meets Boolean Set Cover
- Massively Parallel Bit-Precise Verification with Bitwuzla and Mallob
- MightyPPL: Model Checking MITL with Past and Pnueli Modalities
- Modular Attractor Acceleration in Infinite-State Games
- Mopsa-C: Towards Incorrectness and Termination Verdicts (Competition Contribution)
- Multiple Long-Run and ømega-Regular Objectives in MDPs
- On Deciding Constant Runtime of Linear Loops
- Orbitopal Fixing in SAT
- Parallel SMT Solving via Iterative Tree Partitioning
- QSOLE: Automatic QBF Equivalence Checking
- Quantifier Elimination Meets Treewidth
- Re3ver: Reverse and Verify - (Competition Contribution)
- ReCheck: Automated Contextual Improvement Verifier for Functional Calculi across User-Defined Operational Semantics
- ReFuncTion: Conditional Termination by Abstract Interpretation of Numerical C Programs - (Competition Contribution)
- ReVEAL: GNN-Guided Reverse Engineering for Formal Verification of Optimized Multipliers
- Real-time Proof Checking for Distributed Incremental SAT Solving
- Revisiting Stateful Partial-Order Reduction
- Robust Verification of Concurrent Stochastic Games
- Robustness Verification of Graph Neural Networks Via Lightweight Satisfiability Testing
- SMT(LIA) Sampling with High Diversity
- SMTScope: Automated and Efficient Analysis of SMT Traces
- SWAT: Improvements to the Symbolic Executor (Competition Contribution)
- Same Engine, Multiple Gears: Parallelizing Fixpoint Iteration at Different Granularities
- Seal: Symbolic Execution with Separation Logic - (Competition Contribution)
- Smt.ml: A Multi-Backend Frontend for SMT Solvers in OCaml
- Symbiotic 11 Predicate Abstraction Joins the Party - (Competition Contribution)
- Syntactically Convex Model-Based Projection for Linear Real Arithmetic
- TEMPORA: Efficient Verification of Metric Temporal Properties with Past in Pointwise Semantics
- Trace Repair for Temporal Behavior Trees
- Ultimate Automizer with a One-Dimensional Memory Model - (Competition Contribution)
- Ultimate Paralizer: Parallel Trace Abstraction (Competition Contribution)
- VeriLHyS: a Framework for LTL Specification and Verification of Hybrid Systems
- VeriStruct: AI-assisted Automated Verification of Data-Structure Modules in Verus
- Verifying First-Order Temporal Properties of Infinite-State Systems via Timers and Rankings
- Verifying Floating-Point Programs in Stainless
- jMT: Testing Correctness of Java Memory Models