Truth/SLC - A Parallel Verification Platform for Concurrent Systems
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2,069 papers · page 80 of 104
SDLcheck: A Model Checking Tool
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A Unifying Model Checking Approach for Safety Properties of Parameterized Systems
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CLEVER: Divide and Conquer Combinational Logic Equivalence VERification with False Negative Elimination
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Rewriting for Symbolic Execution of State Machine Models
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Towards Efficient Verification of Arithmetic Algorithms over Galois Fields GF(2m)
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Certifying Model Checkers
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Software Documentation and the Verification Process
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Finite Instantiations in Equivalence Logic with Uninterpreted Functions
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Automated Inductive Verification of Parameterized Protocols
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EASN: Integrating ASN.1 and Model Checking
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Symmetry and Reduced Symmetry in Model Checking
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AGVI - Automatic Generation, Verification, and Implementation of Security Protocols
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EVC: A Validity Checker for the Logic of Equality with Uninterpreted Functions and Memories, Exploiting Positive Equality, and Conservative Transformations
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Automatic Abstraction for Verification of Timed Circuits and Systems
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FoCs: Automatic Generation of Simulation Checkers from Formal Specifications
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Unfoldings of Unbounded Petri Nets
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Invited Tutorial: Verification of Infinite-State and Parameterized Systems
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Detecting Errors Before Reaching Them
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Efficient Reachability Analysis of Hierarchical Reactive Machines
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